1. Field Of The Invention
This invention relates generally to redundant processing systems and, more particularly, to a multi-channel redundant processor system which is readily adaptable for use with multiple processors connected thereto.
2. Description Of The Related Art
Multi-channel redundant processing systems have been proposed by the art utilizing either synchronous or asynchronous operation among the redundant channels. One effective multi-channel process system is described in U.S. patent application Ser. No. 372,734, filed on Apr. 28, 1982, now, U.S. Pat. No. 4,497,059 by T. Basil Smith, which system utilizes a tightly synchronous operation, as explained therein, wherein all channels operate equally (i.e., without the need to arrange a master/slave relationship among them). All channels are capable of receiving data information, for example, which information is mutually exchanged, or distributed, among all the channels and transmitted to suitable voter circuitry in each channel so as to provide a voted output in each channel based on the distributed information. The voted outputs from all unfailed channels are identical and the voted output from a failed channel will be different from that of the unfailed channels. Such redundant system as a whole is assured that all identical voted outputs represent information which is the desired correct information and is further assured that failed channels thereby can be suitably identified.
Because the channels are all operating in a tightly synchronized manner, signals can be transferred among the channels in a simple manner without the complex circuitry necessary when using asynchronous operation, for example, or when using some intermediate form of loosely synchronized operation. The approach described therein can be extended to any number of redundant channels to provide the desired operation.
The approach described therein tends to be limited, however, to the computing power of the processors from which it is constructed. If data processing requirements exceed the redundant processor capability, different processors must then be utilized and the system redesigned therefor. In some cases processors with sufficient processing capability may not be available.
While it may be possible to solve the problem of processing power requirements by providing increased processing power merely by implementing multi-processor fault-tolerant systems, such approach involves considerable processing overhead and channel interconnection complexity. Such an approach is particularly inefficient when multiple software versions of the same functions are implemented to protect from software errors. In the latter situation the total processing burden will be the product of the hardware redundancy level (R) and the number of versions (N) of the software used.
It is desirable, therefore, to improve the flexibility of such a tightly synchronized redundant system by allowing processing power to be added in an incremental fashion. Such concept can be particularly effective for executing multiple versions of software wherein the total processing burden will be less than the product of the hardware redundancy level and the number of versions of software used.